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ISLA224P
TABLE 10. OUTPUT MODE CONTROL
0x73[7:5]
Bits 2:0 User Test Mode
The three LSBs in this register determine the test pattern in
VALUE
000
001
OUTPUT MODE
LVDS 3mA (Default)
LVDS 2mA
combination with registers 0xC1 through 0xD0. Refer to the
“SPI Memory Map” on page 29.
TABLE 13. OUTPUT TEST MODES
100
LVCMOS
VALUE
0xC0[7:4]
OUTPUT TEST MODE
WORD 1
WORD 2
TABLE 11. OUTPUT FORMAT CONTROL
0000
Off
VALUE
000
010
100
0x73[2:0]
OUTPUT FORMAT
Two’s Complement (Default)
Gray Code
Offset Binary
0001
0010
0011
0100
0101
Midscale
Positive Full-Scale
Negative Full-Scale
Reserved
Reserved
0x8000
0xFFFF
0x0000
N/A
N/A
N/A
N/A
N/A
N/A
N/A
ADDRESS 0X74: OUTPUT_MODE_B
Bit 6 DLL Range
This bit sets the DLL operating range to fast (default) or slow.
Internal clock signals are generated by a delay-locked loop (DLL),
which has a finite operating range. Table 12 shows the allowable
sample rate ranges for the slow and fast settings.
0110
0111
1000
1001
1010
Reserved
Reserved
User Pattern
Reserved
Ramp
N/A
user_patt1
N/A
N/A
N/A
user_patt2
N/A
N/A
TABLE 12. DLL RANGES
ADDRESS 0XC1: USER_PATT1_LSB
DLL RANGE
Slow
Fast
MIN
40
80
MAX
100
250
UNIT
MSPS
MSPS
ADDRESS 0XC2: USER_PATT1_MSB
These registers define the lower and upper eight bits,
respectively, of the user-defined pattern 1.
ADDRESS 0XB6: CALIBRATION STATUS
The LSB at address 0xB6 can be read to determine calibration
status. The bit is ‘0’ during calibration and goes to a logic ‘1’
when calibration is complete.This register is unique in that it can
be read after POR at calibration, unlike the other registers on
chip, which can’t be read until calibration is complete.
DEVICE TEST
The ISLA224P25 can produce preset or user defined patterns on
the digital outputs to facilitate in-situ testing. A user can pick
from preset built-in patterns by writing to the output test mode
field [7:4] at 0xC0 or user defined patterns by writing to the user
test mode field [2:0] at 0xC0. The user defined patterns should
be loaded at address space 0xC1 through 0xD0, see the “SPI
Memory Map” on page 29 for more detail.The predefined
patterns are shown in Table 13. The test mode is enabled
asynchronously to the sample clock, therefore several sample
clock cycles may elapse before the data is present on the output
bus.
ADDRESS 0XC0: TEST_IO
Bits 7:4 Output Test Mode
These bits set the test mode according to Table 13. Other
values are reserved.User test patterns loaded at 0xC1 through
0xD0 are also available by writing ‘1000’ to [7:4] at 0xC0 and a
pattern depth value to [2:0] at 0xC0. See the “SPI Memory
Map” on page 29.
27
ADDRESS 0XC3: USER_PATT2_LSB
ADDRESS 0XC4: USER_PATT2_MSB
These registers define the lower and upper eight bits,
respectively, of the user-defined pattern 2
ADDRESS 0XC5: USER_PATT3_LSB
ADDRESS 0XC6: USER_PATT3_MSB
These registers define the lower and upper eight bits,
respectively, of the user-defined pattern 3
ADDRESS 0XC7: USER_PATT4_LSB
ADDRESS 0XC8: USER_PATT4_MSB
These registers define the lower and upper eight bits,
respectively, of the user-defined pattern 4.
ADDRESS 0XC9: USER_PATT5_LSB
ADDRESS 0XCA: USER_PATT5_MSB
These registers define the lower and upper eight bits,
respectively, of the user-defined pattern 5.
ADDRESS 0XCB: USER_PATT6_LSB
ADDRESS 0XCC: USER_PATT6_MSB
These registers define the lower and upper eight bits,
respectively, of the user-defined pattern 6
FN7570.1
November 30, 2012
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相关代理商/技术参数
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ISLA224P12 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance Dual 14-Bit, 125MSPS ADC
ISLA224P12IRZ 制造商:Intersil Corporation 功能描述:DUAL 14-BIT 125MSPS UNBUFFERED INPUT, 72-PIN - Trays 制造商:Intersil Corporation 功能描述:IC ADC 14BIT SPI/SRL 125M 48QFN 制造商:Intersil 功能描述:Dual 14-Bit 125MSPS Unbuffered Input, 72
ISLA224P13 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Dual 14-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA224P13IRZ 制造商:Intersil Corporation 功能描述:DUAL 14-BIT 130MSPS UNBUFFERED INPUT, 72-PIN - Trays 制造商:Intersil Corporation 功能描述:IC ADC 14BIT SRL/SPI 72QFN 制造商:Intersil 功能描述:DL 14-BIT 130MSPS UNBUFRED INPUT 72PIN
ISLA224P20 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Dual 14-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA224P20IRZ 制造商:Intersil Corporation 功能描述:DUAL 14-BIT 200MSPS UNBUFFERED INPUT, 72-PIN - Trays 制造商:Intersil Corporation 功能描述:IC ADC 14BIT SRL/SPI 72QFN 制造商:Intersil 功能描述:DL 14-BIT 200MSPS UNBUFRED INPUT 72PIN 制造商:Intersil Corporation 功能描述:IC, ADC, 14BIT; Resolution (Bits):14bit; Sampling Rate:200MSPS; Supply Voltage Type:Single; Supply Voltage Min:1.7V; Supply Voltage Max:1.9V; Supply Current:375mA; Digital IC Case Style:QFN; No. of Pins:72; Data Interface:SPI ;RoHS Compliant: Yes
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